The Web Connectivity Lab

SDR Introduction

Software Defined Radio (SDR) affords the most flexibility in investigating and prototyping a variety of wireless solutions. The goal of this project is to implement a testing and prototyping platform that can rapidly modify the low-level physical communication layer (the PHY) and the high-level medium access control layer (the MAC).


The complexity and evolving nature of wireless LAN make a degree of programmability essential for the MAC. Most MACs achieve this by embedding a processor coupled to hardware blocks, such as packet engine or crytopgraphy module. However, it is difficult a-priori to make good decisions as to what areas require hardware acceleration. The ability to run firmware on real hardware in a real network allows design decisions to be based on real data. Conversely, the PHY standard is stable and well understood, however the PHY is usually a dedicated ASIC with almost no reconfigurability. There is little, if any, scope to update different modules within the PHY. This means that studying different protocols and decoding schemes is impossible.


The evolution of processing power has enabled more and more computationally intensive activities to be performed by field programable gate arrays (FPGAs) and multi-core general processors in real time. This approach requires rethinking how radios and communications are handled because one is no longer constrained by a single fixed radio standard. The flexible Software Defined Radio (SDR) allows multiple standards to be accessed depending on location, mobility, throughput, and other requirements.


Research into SDRs will investigate techniques to improve SDR performance and new ways to exploit SDR capabilities for communications. Proper partitioning of the SDR architecture is essential to meet the stringent timing requirements in some wireless standards. We would also look into various algorithm improvement methods, such as collaborative signal processing to reduce conflicts among the wireless systems. Our research will investigate where bottlenecks may occur and whether additional processing power or faster data buses available in the near future can overcome them. New techniques for juggling a small number of radios and numerous wireless connections will be investigated to maximize SDR potential. Adding cognitive radio capabilities to the SDR will allow radios to find free spectrum, regulate radio power consumption, and tailor the radios operation without user intervention.